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<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">struct &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="structXSAVE__HEADER.html">XSAVE_HEADER</a></td></tr>
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<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">struct &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="structFPSTATE.html">FPSTATE</a></td></tr>
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<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">struct &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="structCONTEXT.html">CONTEXT</a></td></tr>
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Typedefs</h2></td></tr>
<tr class="memitem:ga4ca557f14f098e2c733785a3a9a78f50"><td class="memItemLeft" align="right" valign="top">typedef UTIL::FXSAVE_IA32&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CONTEXT.html#ga4ca557f14f098e2c733785a3a9a78f50">FXSAVE</a></td></tr>
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<tr class="memitem:ga85506bdff3706d86277715a6542fd5a7"><td class="memItemLeft" align="right" valign="top">typedef UTIL::FXSAVE_INTEL64_DEFAULT&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CONTEXT.html#ga85506bdff3706d86277715a6542fd5a7">FXSAVE</a></td></tr>
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<tr class="memitem:ga73f8f88949aaecf53a6d23f56399c676"><td class="memItemLeft" align="right" valign="top">typedef struct <a class="el" href="structCONTEXT.html">CONTEXT</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CONTEXT.html#ga73f8f88949aaecf53a6d23f56399c676">CONTEXT</a></td></tr>
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Enumerations</h2></td></tr>
<tr class="memitem:ga479f2b92361e3794145bb90a1ea7e027"><td class="memItemLeft" align="right" valign="top">enum &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CONTEXT.html#ga479f2b92361e3794145bb90a1ea7e027">PROCESSOR_STATE</a> { <br />
&#160;&#160;<a class="el" href="group__CONTEXT.html#gga479f2b92361e3794145bb90a1ea7e027a940f194773d13bfe7b71a589b3d6a29a">PROCESSOR_STATE_X87</a>, 
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&#160;&#160;<a class="el" href="group__CONTEXT.html#gga479f2b92361e3794145bb90a1ea7e027ada893eda0a2fdd23742fb5d9f4ba25a7">PROCESSOR_STATE_XMM</a>, 
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&#160;&#160;<a class="el" href="group__CONTEXT.html#gga479f2b92361e3794145bb90a1ea7e027a15481af1dfee3eb0845669e533b2d5e6">PROCESSOR_STATE_YMM</a>, 
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&#160;&#160;<a class="el" href="group__CONTEXT.html#gga479f2b92361e3794145bb90a1ea7e027a32f9fcc0e7c055726930ee8d563ea248">PROCESSOR_STATE_ZMM</a>, 
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&#160;&#160;<a class="el" href="group__CONTEXT.html#gga479f2b92361e3794145bb90a1ea7e027a6e4756c74bb9d4ac33e6162e3352a988">PROCESSOR_STATE_TMM</a>
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Functions</h2></td></tr>
<tr class="memitem:ga112f3ad5960ae4c2273c20abb6479b7a"><td class="memItemLeft" align="right" valign="top">BOOL&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CONTEXT.html#ga112f3ad5960ae4c2273c20abb6479b7a">PIN_SupportsProcessorState</a> (<a class="el" href="group__CONTEXT.html#ga479f2b92361e3794145bb90a1ea7e027">PROCESSOR_STATE</a> state)</td></tr>
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<tr class="memitem:gabd227ecb35493c392d80173180acd7c7"><td class="memItemLeft" align="right" valign="top">BOOL&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CONTEXT.html#gabd227ecb35493c392d80173180acd7c7">PIN_ContextContainsState</a> (<a class="el" href="structCONTEXT.html">CONTEXT</a> *ctxt, <a class="el" href="group__CONTEXT.html#ga479f2b92361e3794145bb90a1ea7e027">PROCESSOR_STATE</a> state)</td></tr>
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<tr class="memitem:gae96c2fa413d6009f9775cfebab49912f"><td class="memItemLeft" align="right" valign="top">VOID&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CONTEXT.html#gae96c2fa413d6009f9775cfebab49912f">PIN_SetContextRegval</a> (<a class="el" href="structCONTEXT.html">CONTEXT</a> *ctxt, <a class="el" href="group__REG.html#ga8f899d7ad1af070aae505a85cc998fa5">REG</a> reg, const UINT8 *val)</td></tr>
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<tr class="memitem:ga44f8eeba2b8b874087441df1c3a530e2"><td class="memItemLeft" align="right" valign="top">VOID&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CONTEXT.html#ga44f8eeba2b8b874087441df1c3a530e2">PIN_GetContextRegval</a> (const <a class="el" href="structCONTEXT.html">CONTEXT</a> *ctxt, <a class="el" href="group__REG.html#ga8f899d7ad1af070aae505a85cc998fa5">REG</a> reg, UINT8 *val)</td></tr>
<tr class="separator:ga44f8eeba2b8b874087441df1c3a530e2"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga83c0549f92440cf717c08689c47127cd"><td class="memItemLeft" align="right" valign="top">VOID&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CONTEXT.html#ga83c0549f92440cf717c08689c47127cd">PIN_SetContextReg</a> (<a class="el" href="structCONTEXT.html">CONTEXT</a> *ctxt, <a class="el" href="group__REG.html#ga8f899d7ad1af070aae505a85cc998fa5">REG</a> reg, ADDRINT val)</td></tr>
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<tr class="memitem:ga5b5aea73f92ac62e0767cb32bf8de4ed"><td class="memItemLeft" align="right" valign="top">ADDRINT&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CONTEXT.html#ga5b5aea73f92ac62e0767cb32bf8de4ed">PIN_GetContextReg</a> (const <a class="el" href="structCONTEXT.html">CONTEXT</a> *ctxt, <a class="el" href="group__REG.html#ga8f899d7ad1af070aae505a85cc998fa5">REG</a> reg)</td></tr>
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<tr class="memitem:ga147e92f2d15f95bd43cb6c8ea19057f4"><td class="memItemLeft" align="right" valign="top">VOID&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CONTEXT.html#ga147e92f2d15f95bd43cb6c8ea19057f4">PIN_SetContextFPState</a> (<a class="el" href="structCONTEXT.html">CONTEXT</a> *ctxt, const <a class="el" href="structFPSTATE.html">FPSTATE</a> *fpstate)</td></tr>
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<tr class="memitem:ga628d9e2f229dc5101142c94a5411d073"><td class="memItemLeft" align="right" valign="top">VOID&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CONTEXT.html#ga628d9e2f229dc5101142c94a5411d073">PIN_GetContextFPState</a> (const <a class="el" href="structCONTEXT.html">CONTEXT</a> *ctxt, <a class="el" href="structFPSTATE.html">FPSTATE</a> *fpstate)</td></tr>
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<tr class="memitem:gacbaac112366f778eedeb4b258a40558f"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__REG.html#ga8a33ca031ce83cf24d58dca8adf19f6c">REGSET</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CONTEXT.html#gacbaac112366f778eedeb4b258a40558f">PIN_GetFullContextRegsSet</a> ()</td></tr>
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<tr class="memitem:gabd0a55669ab303520f82e4f512e084f9"><td class="memItemLeft" align="right" valign="top">VOID&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CONTEXT.html#gabd0a55669ab303520f82e4f512e084f9">PIN_SaveContext</a> (const <a class="el" href="structCONTEXT.html">CONTEXT</a> *ctxtFrom, <a class="el" href="structCONTEXT.html">CONTEXT</a> *ctxtTo)</td></tr>
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<tr class="memitem:gade2217c59d6e6b5cad08a59afe3d879a"><td class="memItemLeft" align="right" valign="top">VOID&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CONTEXT.html#gade2217c59d6e6b5cad08a59afe3d879a">PIN_ExecuteAt</a> (const <a class="el" href="structCONTEXT.html">CONTEXT</a> *ctxt)</td></tr>
<tr class="separator:gade2217c59d6e6b5cad08a59afe3d879a"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga992f6073d146d7c5a61476f3a1ce474a"><td class="memItemLeft" align="right" valign="top">int&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CONTEXT.html#ga992f6073d146d7c5a61476f3a1ce474a">PIN_GetInitialContextForUnwind</a> (const <a class="el" href="structCONTEXT.html">CONTEXT</a> *ctxt, void *cursor)</td></tr>
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<tr class="memitem:ga9e0232d7642468e8bfbd4eca00983ecf"><td class="memItemLeft" align="right" valign="top">int&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CONTEXT.html#ga9e0232d7642468e8bfbd4eca00983ecf">PIN_Backtrace</a> (const <a class="el" href="structCONTEXT.html">CONTEXT</a> *ctxt, void **buffer, int size)</td></tr>
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Variables</h2></td></tr>
<tr class="memitem:gad1b665d43ed8655d42cf86e474ceb5ea"><td class="memItemLeft" align="right" valign="top">const size_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CONTEXT.html#gad1b665d43ed8655d42cf86e474ceb5ea">VSTATE_PADDING</a> = 128</td></tr>
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<tr class="memitem:gaaf302a6d2cb4e89c0355540b1b0951d7"><td class="memItemLeft" align="right" valign="top">const size_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CONTEXT.html#gaaf302a6d2cb4e89c0355540b1b0951d7">FPSTATE_SIZE</a> = sizeof(<a class="el" href="structFPSTATE.html">FPSTATE</a>)</td></tr>
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<tr class="memitem:ga0f5ad5017cf79566f740ff72e37dfeec"><td class="memItemLeft" align="right" valign="top">const size_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CONTEXT.html#ga0f5ad5017cf79566f740ff72e37dfeec">FPSTATE_ALIGNMENT</a> = 64</td></tr>
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<tr class="memitem:gad1b665d43ed8655d42cf86e474ceb5ea"><td class="memItemLeft" align="right" valign="top">const size_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CONTEXT.html#gad1b665d43ed8655d42cf86e474ceb5ea">VSTATE_PADDING</a> = 128</td></tr>
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<tr class="memitem:gaaf302a6d2cb4e89c0355540b1b0951d7"><td class="memItemLeft" align="right" valign="top">const size_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CONTEXT.html#gaaf302a6d2cb4e89c0355540b1b0951d7">FPSTATE_SIZE</a> = sizeof(<a class="el" href="structFPSTATE.html">FPSTATE</a>)</td></tr>
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<tr class="memitem:ga0f5ad5017cf79566f740ff72e37dfeec"><td class="memItemLeft" align="right" valign="top">const size_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CONTEXT.html#ga0f5ad5017cf79566f740ff72e37dfeec">FPSTATE_ALIGNMENT</a> = 64</td></tr>
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const ADDRINT&#160;</td><td class="memItemRight" valign="bottom"><b>NUM_PHYSICAL_REGS</b> = REG_PHYSICAL_INTEGER_END - REG_PHYSICAL_INTEGER_BASE + 1</td></tr>
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const ADDRINT&#160;</td><td class="memItemRight" valign="bottom"><b>NUM_SCRATCH_REGS</b> = REG_INST_SCRATCH_LAST - <a class="el" href="group__REG.html#gga8f899d7ad1af070aae505a85cc998fa5ad593e48273d23890fe59832257fad44d">REG_INST_SCRATCH_BASE</a> + 1</td></tr>
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<tr class="memitem:gaead9b5f2f3655bbaf2776ad99e2ad279"><td class="memItemLeft" align="right" valign="top">const ADDRINT&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CONTEXT.html#gaead9b5f2f3655bbaf2776ad99e2ad279">NUM_SPECIAL_REGS</a> = 2 + NUM_SCRATCH_REGS</td></tr>
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<tr class="memitem:gab6031aa9d9115234b9c49c6d5ab6d9fa"><td class="memItemLeft" align="right" valign="top">const ADDRINT&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CONTEXT.html#gab6031aa9d9115234b9c49c6d5ab6d9fa">NUM_CONTEXT_INT_REGS</a> = NUM_PHYSICAL_REGS + <a class="el" href="group__CONTEXT.html#gaead9b5f2f3655bbaf2776ad99e2ad279">NUM_SPECIAL_REGS</a></td></tr>
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<tr class="memitem:ga565196a3eaf9539660ef24845ca8c967"><td class="memItemLeft" align="right" valign="top">const ADDRINT&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CONTEXT.html#ga565196a3eaf9539660ef24845ca8c967">NUM_CONTEXT_REGS</a> = REG_LAST_CONTEXT_REG + 1</td></tr>
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<tr class="memitem:gacfbdf1b39ed0b4164bd9321b830861c9"><td class="memItemLeft" align="right" valign="top">const ADDRINT&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CONTEXT.html#gacfbdf1b39ed0b4164bd9321b830861c9">TILE_SIZE_BYTES</a> = 1024</td></tr>
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<tr class="memitem:ga3657dd0da615cb4afd7682f365979373"><td class="memItemLeft" align="right" valign="top">const ADDRINT&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CONTEXT.html#ga3657dd0da615cb4afd7682f365979373">TILECFG_SIZE_BYTES</a> = 64</td></tr>
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<tr class="memitem:ga47e2bd8a7244f986c5a007bd7070f851"><td class="memItemLeft" align="right" valign="top">const ADDRINT&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CONTEXT.html#ga47e2bd8a7244f986c5a007bd7070f851">NUM_TILE_REGS</a> = REG_TMM_LAST - REG_TMM_FIRST + 1</td></tr>
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<tr class="memitem:ga67017a2889bb2234e34bd3a943c94bfe"><td class="memItemLeft" align="right" valign="top">const ADDRINT&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CONTEXT.html#ga67017a2889bb2234e34bd3a943c94bfe">NUM_TILE_AND_CFG_REGS</a> = <a class="el" href="group__CONTEXT.html#ga47e2bd8a7244f986c5a007bd7070f851">NUM_TILE_REGS</a> + 1</td></tr>
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<tr class="memitem:ga0b20fa4bfec9777b1e6f0a43e886c712"><td class="memItemLeft" align="right" valign="top">const ADDRINT&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CONTEXT.html#ga0b20fa4bfec9777b1e6f0a43e886c712">TILE_STATE_SIZE</a> = (<a class="el" href="group__CONTEXT.html#ga47e2bd8a7244f986c5a007bd7070f851">NUM_TILE_REGS</a>) * <a class="el" href="group__CONTEXT.html#gacfbdf1b39ed0b4164bd9321b830861c9">TILE_SIZE_BYTES</a></td></tr>
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<tr class="memitem:ga15b5de856336b8d0452a63a746bb9c61"><td class="memItemLeft" align="right" valign="top">const ADDRINT&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CONTEXT.html#ga15b5de856336b8d0452a63a746bb9c61">ARCH_STATE_SIZE</a></td></tr>
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<tr class="memitem:ga63af62bca2c39be3fd6edd57ad2ac5c3"><td class="memItemLeft" align="right" valign="top">const ADDRINT&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CONTEXT.html#ga63af62bca2c39be3fd6edd57ad2ac5c3">DEFAULT_CONTEXT_IMPL</a> = 0</td></tr>
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<a name="details" id="details"></a><h2 class="groupheader">Detailed Description</h2>
<p>This API allows the user to read and modify the architectural register state of the processor, as seen in the application that runs under Pin.</p>
<p>Usually, the tool receives context in the instrumentation callback like THREAD_START_CALLBACK, CONTEXT_CHANGE_CALLBACK, or when it specifies explicitly to pass <a class="el" href="structCONTEXT.html">CONTEXT</a> to the instrumentation routine via IARG_CONTEXT, IARG_CONST_CONTEXT or IARG_PARTIAL_CONTEXT. At this time, the tool can read the individual register value via <a class="el" href="group__CONTEXT.html#ga5b5aea73f92ac62e0767cb32bf8de4ed">PIN_GetContextReg</a> and @PIN_GetContextRegval, or save the entire context using the <a class="el" href="group__CONTEXT.html#gabd0a55669ab303520f82e4f512e084f9">PIN_SaveContext</a>. The <a class="el" href="group__CONTEXT.html#gade2217c59d6e6b5cad08a59afe3d879a">PIN_ExecuteAt</a> function can be called from an analysis routine to change the control flow of the thread and start execution from the specified context. The <a class="el" href="group__CONTEXT.html#ga83c0549f92440cf717c08689c47127cd">PIN_SetContextReg</a> and <a class="el" href="group__CONTEXT.html#gae96c2fa413d6009f9775cfebab49912f">PIN_SetContextRegval</a> functions can be used from callbacks to change the thread's given register state. In case where <a class="el" href="group__INST__ARGS.html#gga089c27ca15e9ff139dd3a3f8a6f8451dafbbb614d534693b8997f4a7db8fb7e29">IARG_PARTIAL_CONTEXT</a> was used the behaviour of the threads can be changed by changing registers values without using the <a class="el" href="group__CONTEXT.html#gade2217c59d6e6b5cad08a59afe3d879a">PIN_ExecuteAt</a>. </p>
<h2 class="groupheader">Typedef Documentation</h2>
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<h2 class="memtitle"><span class="permalink"><a href="#ga73f8f88949aaecf53a6d23f56399c676">&#9670;&nbsp;</a></span>CONTEXT</h2>

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<p>Architectural state of the processor.<br  />
The tool should not read or modify data members of this structure directly, but must treat the structure as logically opaque and use the <a class="el" href="group__CONTEXT.html">Context manipulation API</a> functions to manage it. </p>

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<h2 class="memtitle"><span class="permalink"><a href="#ga4ca557f14f098e2c733785a3a9a78f50">&#9670;&nbsp;</a></span>FXSAVE <span class="overload">[1/2]</span></h2>

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<p>Contains declarations of types related to the fp state on ia-32</p>
<p>The memory layout written by FXSAVE and read by FXRSTOR. It is the legacy part of the FP state </p>

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<h2 class="memtitle"><span class="permalink"><a href="#ga85506bdff3706d86277715a6542fd5a7">&#9670;&nbsp;</a></span>FXSAVE <span class="overload">[2/2]</span></h2>

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<p>Contains declarations of types related to the fp state on Intel64</p>
<p>The memory layout written by FXSAVE and read by FXRSTOR. It is the legacy part of the FP state </p>

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<h2 class="groupheader">Enumeration Type Documentation</h2>
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<h2 class="memtitle"><span class="permalink"><a href="#ga479f2b92361e3794145bb90a1ea7e027">&#9670;&nbsp;</a></span>PROCESSOR_STATE</h2>

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          <td class="memname">enum <a class="el" href="group__CONTEXT.html#ga479f2b92361e3794145bb90a1ea7e027">PROCESSOR_STATE</a></td>
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<p>enums for queries on the supported state: PIN_SupportsProcessorState and PIN_ContextContainsState </p>
<table class="fieldtable">
<tr><th colspan="2">Enumerator</th></tr><tr><td class="fieldname"><a id="gga479f2b92361e3794145bb90a1ea7e027a940f194773d13bfe7b71a589b3d6a29a"></a>PROCESSOR_STATE_X87&#160;</td><td class="fielddoc"><p>is the X87 (fp stack) supported </p>
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<tr><td class="fieldname"><a id="gga479f2b92361e3794145bb90a1ea7e027ada893eda0a2fdd23742fb5d9f4ba25a7"></a>PROCESSOR_STATE_XMM&#160;</td><td class="fielddoc"><p>are the xmm registers supported (AVX) </p>
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<tr><td class="fieldname"><a id="gga479f2b92361e3794145bb90a1ea7e027a15481af1dfee3eb0845669e533b2d5e6"></a>PROCESSOR_STATE_YMM&#160;</td><td class="fielddoc"><p>are the ymm registers supported (AVX2) </p>
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<tr><td class="fieldname"><a id="gga479f2b92361e3794145bb90a1ea7e027a32f9fcc0e7c055726930ee8d563ea248"></a>PROCESSOR_STATE_ZMM&#160;</td><td class="fielddoc"><p>are the zmm registers supported (AVX512) </p>
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<tr><td class="fieldname"><a id="gga479f2b92361e3794145bb90a1ea7e027a6e4756c74bb9d4ac33e6162e3352a988"></a>PROCESSOR_STATE_TMM&#160;</td><td class="fielddoc"><p>are the tmm registers supported (AMX) </p>
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<h2 class="groupheader">Function Documentation</h2>
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<h2 class="memtitle"><span class="permalink"><a href="#ga9e0232d7642468e8bfbd4eca00983ecf">&#9670;&nbsp;</a></span>PIN_Backtrace()</h2>

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          <td class="memname">int PIN_Backtrace </td>
          <td>(</td>
          <td class="paramtype">const <a class="el" href="structCONTEXT.html">CONTEXT</a> *&#160;</td>
          <td class="paramname"><em>ctxt</em>, </td>
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<p>This function is the equivalent Pin version of backtrace(): While backtrace() generates a backtrace for the Pin (and Pin tool) call stack, <a class="el" href="group__CONTEXT.html#ga9e0232d7642468e8bfbd4eca00983ecf">PIN_Backtrace()</a> generates a backtrace for the application that Pin is instrumenting.</p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramdir">[in]</td><td class="paramname">ctxt</td><td>context of the application - the backtrace will be generated based upon it. </td></tr>
    <tr><td class="paramdir">[out]</td><td class="paramname">buffer</td><td>Points to an array on which the backtrace will be stored. </td></tr>
    <tr><td class="paramdir">[in]</td><td class="paramname">size</td><td>specifies the maximum number of addresses that can be stored in buffer. </td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>the number of addresses returned in buffer, which is not greater than <b>size</b>.</dd></dl>
<dl class="section user"><dt>Availability:</dt><dd><b>Mode:</b> All<br  />
<b>O/S</b>: Linux &amp; macOS*<br  />
<b>CPU:</b> IA-32 and Intel(R) 64 architectures<br  />
</dd></dl>

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<h2 class="memtitle"><span class="permalink"><a href="#gabd227ecb35493c392d80173180acd7c7">&#9670;&nbsp;</a></span>PIN_ContextContainsState()</h2>

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          <td class="memname">BOOL PIN_ContextContainsState </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="structCONTEXT.html">CONTEXT</a> *&#160;</td>
          <td class="paramname"><em>ctxt</em>, </td>
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          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype"><a class="el" href="group__CONTEXT.html#ga479f2b92361e3794145bb90a1ea7e027">PROCESSOR_STATE</a>&#160;</td>
          <td class="paramname"><em>state</em>&#160;</td>
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          <td>)</td>
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<p>Query if the specified <a class="el" href="structCONTEXT.html">CONTEXT</a> contains the specified PROCESSOR_STATE.</p>
<dl class="params"><dt>Parameters</dt><dd>
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    <tr><td class="paramdir">[in]</td><td class="paramname">ctxt</td><td>context to be examined </td></tr>
    <tr><td class="paramdir">[in]</td><td class="paramname">state</td><td>the PROCESSOR_STATE being queried </td></tr>
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  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>TRUE if the PROCESSOR_STATE specified by state is contained in the ctxt</dd></dl>
<dl class="section user"><dt>Availability:</dt><dd><b>Mode:</b> JIT<br  />
<b>O/S</b>: Linux, Windows &amp; macOS*<br  />
<b>CPU:</b> IA-32 and Intel(R) 64 architectures<br  />
</dd></dl>

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<h2 class="memtitle"><span class="permalink"><a href="#gade2217c59d6e6b5cad08a59afe3d879a">&#9670;&nbsp;</a></span>PIN_ExecuteAt()</h2>

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<p>A tool can call this API to abandon the current analysis function and resume execution of the calling thread at a new application register state. Note that this API does not return back to the caller's analysis function.</p>
<p>This API can be called from an analysis function or a replacement routine, but not from a callback.</p>
<p>When this API is called from an analysis function or replacement function, and if they execute the current routine or instruction being analyzed, then execution will resume at the instrumented routine or instruction and the analysis function will be called again. It is the pintool's responsibility to avoid going into an infinite loop of calls to the analysis function.</p>
<dl class="params"><dt>Parameters</dt><dd>
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    <tr><td class="paramdir">[in]</td><td class="paramname">ctxt</td><td>New application register state for the calling thread.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>This API never returns.</dd></dl>
<dl class="section note"><dt>Note</dt><dd>The vm lock is obtained during the call of this API.</dd></dl>
<dl class="section user"><dt>Availability:</dt><dd><b>Mode:</b> JIT<br  />
<b>O/S</b>: Linux, Windows &amp; macOS*<br  />
<b>CPU:</b> IA-32 and Intel(R) 64 architectures<br  />
</dd></dl>

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<h2 class="memtitle"><span class="permalink"><a href="#ga628d9e2f229dc5101142c94a5411d073">&#9670;&nbsp;</a></span>PIN_GetContextFPState()</h2>

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          <td class="memname">VOID PIN_GetContextFPState </td>
          <td>(</td>
          <td class="paramtype">const <a class="el" href="structCONTEXT.html">CONTEXT</a> *&#160;</td>
          <td class="paramname"><em>ctxt</em>, </td>
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          <td class="paramtype"><a class="el" href="structFPSTATE.html">FPSTATE</a> *&#160;</td>
          <td class="paramname"><em>fpstate</em>&#160;</td>
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<p>Get the floating point state of the specified context.</p>
<dl class="params"><dt>Parameters</dt><dd>
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    <tr><td class="paramdir">[in]</td><td class="paramname">ctxt</td><td>context whose floating point state is retrieved </td></tr>
    <tr><td class="paramdir">[in]</td><td class="paramname">fpstate</td><td>pointer to the buffer that receives floating point state of the context. the <a class="el" href="structFPSTATE.html">FPSTATE</a> type is exposed by Pin.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section user"><dt>Availability:</dt><dd><b>Mode:</b> JIT<br  />
<b>O/S</b>: Linux, Windows &amp; macOS*<br  />
<b>CPU:</b> IA-32 and Intel(R) 64 architectures<br  />
</dd></dl>

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<h2 class="memtitle"><span class="permalink"><a href="#ga5b5aea73f92ac62e0767cb32bf8de4ed">&#9670;&nbsp;</a></span>PIN_GetContextReg()</h2>

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          <td class="memname">ADDRINT PIN_GetContextReg </td>
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          <td class="paramtype">const <a class="el" href="structCONTEXT.html">CONTEXT</a> *&#160;</td>
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          <td class="paramtype"><a class="el" href="group__REG.html#ga8f899d7ad1af070aae505a85cc998fa5">REG</a>&#160;</td>
          <td class="paramname"><em>reg</em>&#160;</td>
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<p>Get the value of the integer register or fp status/control register in the specified context. Note that fp registers such as fp-stack regs, xmm regs, ymm regs (when running with Intel(R) AVX support), can only be read using <a class="el" href="group__CONTEXT.html#ga44f8eeba2b8b874087441df1c3a530e2">PIN_GetContextRegval</a>.</p>
<dl class="params"><dt>Parameters</dt><dd>
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    <tr><td class="paramdir">[in]</td><td class="paramname">ctxt</td><td>context whose register value is requested </td></tr>
    <tr><td class="paramdir">[in]</td><td class="paramname">reg</td><td>register whose value is requested. This could be an integer register or a floating point register with integer values, like FP status/control register. </td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>value of the register in the specified context</dd></dl>
<dl class="section user"><dt>Availability:</dt><dd><b>Mode:</b> JIT<br  />
<b>O/S</b>: Linux, Windows &amp; macOS*<br  />
<b>CPU:</b> IA-32 and Intel(R) 64 architectures<br  />
</dd></dl>

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<h2 class="memtitle"><span class="permalink"><a href="#ga44f8eeba2b8b874087441df1c3a530e2">&#9670;&nbsp;</a></span>PIN_GetContextRegval()</h2>

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          <td class="memname">VOID PIN_GetContextRegval </td>
          <td>(</td>
          <td class="paramtype">const <a class="el" href="structCONTEXT.html">CONTEXT</a> *&#160;</td>
          <td class="paramname"><em>ctxt</em>, </td>
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          <td class="paramtype"><a class="el" href="group__REG.html#ga8f899d7ad1af070aae505a85cc998fa5">REG</a>&#160;</td>
          <td class="paramname"><em>reg</em>, </td>
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          <td class="paramkey"></td>
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          <td class="paramtype">UINT8 *&#160;</td>
          <td class="paramname"><em>val</em>&#160;</td>
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<p>Get the value of the requested register from the context. This function is applicable for all context registers (integer, fp etc).</p>
<dl class="params"><dt>Parameters</dt><dd>
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    <tr><td class="paramdir">[in]</td><td class="paramname">ctxt</td><td>context whose register value is requested </td></tr>
    <tr><td class="paramdir">[in]</td><td class="paramname">reg</td><td>register whose value is requested </td></tr>
    <tr><td class="paramdir">[out]</td><td class="paramname">val</td><td>an empty buffer which will hold the register value, see note below</td></tr>
  </table>
  </dd>
</dl>
<dl class="section note"><dt>Note</dt><dd>It is the user's responsibility to allocate and free the val buffer. The buffer size should be at least as wide as the register. The register size can be obtained using REG_Size.<br  />
 </dd>
<dd>
Trying to read a tile register (REG_TMM0-REG_TMM7) when AMX is not active (<a class="el" href="group__PIN__PROCESS.html#gaa6127aeb954da01691382a96ae2ab729">PIN_IsAmxActive()</a>) or when tile is not valid (rows and bytes per row are both zeroes) leaves the specified val buffer unmodified.</dd></dl>
<dl class="section user"><dt>Availability:</dt><dd><b>Mode:</b> JIT<br  />
<b>O/S</b>: Linux, Windows &amp; macOS*<br  />
<b>CPU:</b> IA-32 and Intel(R) 64 architectures<br  />
</dd></dl>

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<h2 class="memtitle"><span class="permalink"><a href="#gacbaac112366f778eedeb4b258a40558f">&#9670;&nbsp;</a></span>PIN_GetFullContextRegsSet()</h2>

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          <td class="memname"><a class="el" href="group__REG.html#ga8a33ca031ce83cf24d58dca8adf19f6c">REGSET</a> PIN_GetFullContextRegsSet </td>
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<p>Get full REGSET.<br  />
When using IARG_PARTIAL_CONTEXT such a regset for both in and out REGSET will provide access to all registers including the ability to update them. Such a usage will provide better performance than using IARG_CONTEXT combined with <a class="el" href="group__CONTEXT.html#gade2217c59d6e6b5cad08a59afe3d879a">PIN_ExecuteAt()</a>.</p>
<dl class="section user"><dt>Availability:</dt><dd><b>Mode:</b> JIT<br  />
<b>O/S</b>: Linux, Windows &amp; macOS*<br  />
<b>CPU:</b> IA-32 and Intel(R) 64 architectures<br  />
</dd></dl>

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<h2 class="memtitle"><span class="permalink"><a href="#ga992f6073d146d7c5a61476f3a1ce474a">&#9670;&nbsp;</a></span>PIN_GetInitialContextForUnwind()</h2>

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          <td class="memname">int PIN_GetInitialContextForUnwind </td>
          <td>(</td>
          <td class="paramtype">const <a class="el" href="structCONTEXT.html">CONTEXT</a> *&#160;</td>
          <td class="paramname"><em>ctxt</em>, </td>
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          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">void *&#160;</td>
          <td class="paramname"><em>cursor</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
</div><div class="memdoc">
<p>libbacktrace equivalent implementation</p>
<p>This function is the equivalent Pin version of unw_getcontext(): While unw_getcontext() generates a context for libunwind based on the native context, <a class="el" href="group__CONTEXT.html#ga992f6073d146d7c5a61476f3a1ce474a">PIN_GetInitialContextForUnwind()</a> generates a context for libunwind based on Pin <a class="el" href="structCONTEXT.html">CONTEXT</a>.</p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramdir">[in]</td><td class="paramname">ctxt</td><td>Pin context to convert to libunwind's context </td></tr>
    <tr><td class="paramdir">[out]</td><td class="paramname">cursor</td><td>Points to valid object of type unw_cursor_t which was initialized using unw_init_local(). </td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>UNW_ESUCCESS in case of success.</dd></dl>
<dl class="section user"><dt>Availability:</dt><dd><b>Mode:</b> All<br  />
<b>O/S</b>: Linux &amp; macOS*<br  />
<b>CPU:</b> IA-32 and Intel(R) 64 architectures<br  />
</dd></dl>

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</div>
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<h2 class="memtitle"><span class="permalink"><a href="#gabd0a55669ab303520f82e4f512e084f9">&#9670;&nbsp;</a></span>PIN_SaveContext()</h2>

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          <td class="memname">VOID PIN_SaveContext </td>
          <td>(</td>
          <td class="paramtype">const <a class="el" href="structCONTEXT.html">CONTEXT</a> *&#160;</td>
          <td class="paramname"><em>ctxtFrom</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype"><a class="el" href="structCONTEXT.html">CONTEXT</a> *&#160;</td>
          <td class="paramname"><em>ctxtTo</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
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<p>Copy the <a class="el" href="structCONTEXT.html">CONTEXT</a> structure.<br  />
<a class="el" href="structCONTEXT.html">CONTEXT</a> structures supplied by Pin to the instrumentation callbacks are not "byte-copyable". The tool should use this function to copy the context provided by Pin and must not attempt to move it as raw memory bytes.</p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramdir">[in]</td><td class="paramname">ctxtFrom</td><td><a class="el" href="structCONTEXT.html">CONTEXT</a> structure to copy from </td></tr>
    <tr><td class="paramdir">[out]</td><td class="paramname">ctxtTo</td><td><a class="el" href="structCONTEXT.html">CONTEXT</a> structure to copy into</td></tr>
  </table>
  </dd>
</dl>
<dl class="section user"><dt>Availability:</dt><dd><b>Mode:</b> JIT<br  />
<b>O/S</b>: Linux, Windows &amp; macOS*<br  />
<b>CPU:</b> IA-32 and Intel(R) 64 architectures<br  />
</dd></dl>

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<h2 class="memtitle"><span class="permalink"><a href="#ga147e92f2d15f95bd43cb6c8ea19057f4">&#9670;&nbsp;</a></span>PIN_SetContextFPState()</h2>

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          <td class="memname">VOID PIN_SetContextFPState </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="structCONTEXT.html">CONTEXT</a> *&#160;</td>
          <td class="paramname"><em>ctxt</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">const <a class="el" href="structFPSTATE.html">FPSTATE</a> *&#160;</td>
          <td class="paramname"><em>fpstate</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
</div><div class="memdoc">
<p>Set the given floating point state in the specified context.</p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramdir">[in,out]</td><td class="paramname">ctxt</td><td>context whose floating point state is to be set </td></tr>
    <tr><td class="paramdir">[in]</td><td class="paramname">fpstate</td><td>new floating point state of the context. the <a class="el" href="structFPSTATE.html">FPSTATE</a> type is exposed by Pin. </td></tr>
  </table>
  </dd>
</dl>
<dl class="section user"><dt>Availability:</dt><dd><b>Mode:</b> JIT<br  />
<b>O/S</b>: Linux, Windows &amp; macOS*<br  />
<b>CPU:</b> IA-32 and Intel(R) 64 architectures<br  />
</dd></dl>

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<h2 class="memtitle"><span class="permalink"><a href="#ga83c0549f92440cf717c08689c47127cd">&#9670;&nbsp;</a></span>PIN_SetContextReg()</h2>

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          <td class="memname">VOID PIN_SetContextReg </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="structCONTEXT.html">CONTEXT</a> *&#160;</td>
          <td class="paramname"><em>ctxt</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype"><a class="el" href="group__REG.html#ga8f899d7ad1af070aae505a85cc998fa5">REG</a>&#160;</td>
          <td class="paramname"><em>reg</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">ADDRINT&#160;</td>
          <td class="paramname"><em>val</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
</div><div class="memdoc">
<p>Set the given value for the integer register or fp status/control register in the specified context. Note that fp registers such as fp-stack regs, xmm regs, ymm regs (when running with Intel(R) AVX support), can only be set using <a class="el" href="group__CONTEXT.html#gae96c2fa413d6009f9775cfebab49912f">PIN_SetContextRegval</a>.</p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramdir">[in,out]</td><td class="paramname">ctxt</td><td>context whose register value is to be set </td></tr>
    <tr><td class="paramdir">[in]</td><td class="paramname">reg</td><td>register whose value is to be set. This could be an integer register or a floating point register with integer values, like FP status/control register. </td></tr>
    <tr><td class="paramdir">[in]</td><td class="paramname">val</td><td>new value of the register</td></tr>
  </table>
  </dd>
</dl>
<dl class="section user"><dt>Availability:</dt><dd><b>Mode:</b> JIT<br  />
<b>O/S</b>: Linux, Windows &amp; macOS*<br  />
<b>CPU:</b> IA-32 and Intel(R) 64 architectures<br  />
</dd></dl>

</div>
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<h2 class="memtitle"><span class="permalink"><a href="#gae96c2fa413d6009f9775cfebab49912f">&#9670;&nbsp;</a></span>PIN_SetContextRegval()</h2>

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          <td class="memname">VOID PIN_SetContextRegval </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="structCONTEXT.html">CONTEXT</a> *&#160;</td>
          <td class="paramname"><em>ctxt</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype"><a class="el" href="group__REG.html#ga8f899d7ad1af070aae505a85cc998fa5">REG</a>&#160;</td>
          <td class="paramname"><em>reg</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">const UINT8 *&#160;</td>
          <td class="paramname"><em>val</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
</div><div class="memdoc">
<p>Set the given value for the requested register in the context. This function is applicable for all context registers (integer, fp etc.). When this function is used from within a callback, e.g. THREAD_START_CALLBACK, the new context will take effect when the application continues. If this function is called from within an analysis routine, in order for the new context to take effect when the application continues one must do one of the following: Either use <a class="el" href="group__INST__ARGS.html#gga089c27ca15e9ff139dd3a3f8a6f8451dafbbb614d534693b8997f4a7db8fb7e29">IARG_PARTIAL_CONTEXT</a> and specify the registers which should be modified in the "out" REGSET. Or, use the IARG_CONTEXT and call <a class="el" href="group__CONTEXT.html#gade2217c59d6e6b5cad08a59afe3d879a">PIN_ExecuteAt</a> (don't forget to set REG_INST_PTR appropriately).</p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramdir">[in,out]</td><td class="paramname">ctxt</td><td>context whose register value is to be set </td></tr>
    <tr><td class="paramdir">[in]</td><td class="paramname">reg</td><td>register whose value is to be set </td></tr>
    <tr><td class="paramdir">[in]</td><td class="paramname">val</td><td>buffer holding the new value of the register, see note below</td></tr>
  </table>
  </dd>
</dl>
<dl class="section note"><dt>Note</dt><dd>It is the user's responsibility to allocate and free the val buffer. The buffer size should be at least as wide as the register. The register size can be obtained using REG_Size.<br  />
 </dd>
<dd>
Trying to set a value inside a tile register (REG_TMM0-REG_TMM7) when AMX is not active (<a class="el" href="group__PIN__PROCESS.html#gaa6127aeb954da01691382a96ae2ab729">PIN_IsAmxActive()</a>) or when tile is not valid (rows and bytes per row are both zeroes) leaves the specified <a class="el" href="structCONTEXT.html">CONTEXT</a> unmodified. </dd>
<dd>
Setting tile config meta data register (REG_TILECONFIG) inside <a class="el" href="structCONTEXT.html">CONTEXT</a> initialize all tile registers to zero inside context. This mimics CPU behavior.</dd></dl>
<dl class="section user"><dt>Availability:</dt><dd><b>Mode:</b> JIT<br  />
<b>O/S</b>: Linux, Windows &amp; macOS*<br  />
<b>CPU:</b> IA-32 and Intel(R) 64 architectures<br  />
</dd></dl>

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<h2 class="memtitle"><span class="permalink"><a href="#ga112f3ad5960ae4c2273c20abb6479b7a">&#9670;&nbsp;</a></span>PIN_SupportsProcessorState()</h2>

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          <td class="memname">BOOL PIN_SupportsProcessorState </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="group__CONTEXT.html#ga479f2b92361e3794145bb90a1ea7e027">PROCESSOR_STATE</a>&#160;</td>
          <td class="paramname"><em>state</em></td><td>)</td>
          <td></td>
        </tr>
      </table>
</div><div class="memdoc">
<p>Query if Pin (and CPU) supports the specified PROCESSOR_STATE.</p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramdir">[in]</td><td class="paramname">state</td><td>the PROCESSOR_STATE being queried </td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>TRUE if the PROCESSOR_STATE specified by state is supported by Pin</dd></dl>
<dl class="section user"><dt>Availability:</dt><dd><b>Mode:</b> JIT<br  />
<b>O/S</b>: Linux, Windows &amp; macOS*<br  />
<b>CPU:</b> IA-32 and Intel(R) 64 architectures<br  />
</dd></dl>

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</div>
<h2 class="groupheader">Variable Documentation</h2>
<a id="ga15b5de856336b8d0452a63a746bb9c61"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga15b5de856336b8d0452a63a746bb9c61">&#9670;&nbsp;</a></span>ARCH_STATE_SIZE</h2>

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          <td class="memname">const ADDRINT ARCH_STATE_SIZE</td>
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<b>Initial value:</b><div class="fragment"><div class="line">=</div>
<div class="line">    (NUM_PHYSICAL_REGS + <a class="code" href="group__CONTEXT.html#gaead9b5f2f3655bbaf2776ad99e2ad279">NUM_SPECIAL_REGS</a>) * <span class="keyword">sizeof</span>(ADDRINT) + (<a class="code" href="group__CONTEXT.html#gaaf302a6d2cb4e89c0355540b1b0951d7">FPSTATE_SIZE</a> </div>
<div class="line">                                                                             </div>
<div class="line">                                                                             </div>
<div class="line">                                                                             </div>
<div class="line">                                                                + <a class="code" href="group__CONTEXT.html#ga0f5ad5017cf79566f740ff72e37dfeec">FPSTATE_ALIGNMENT</a></div>
<div class="line"> </div>
<div class="line">                                                                </div>
<div class="line">                                                                </div>
<div class="line">                                                                + <a class="code" href="group__CONTEXT.html#ga0b20fa4bfec9777b1e6f0a43e886c712">TILE_STATE_SIZE</a> + <a class="code" href="group__CONTEXT.html#ga3657dd0da615cb4afd7682f365979373">TILECFG_SIZE_BYTES</a> + <a class="code" href="group__CONTEXT.html#ga67017a2889bb2234e34bd3a943c94bfe">NUM_TILE_AND_CFG_REGS</a></div>
<div class="line"> </div>
<div class="line">                                                                )</div>
</div><!-- fragment --><p>Size of the <a class="el" href="structCONTEXT.html">CONTEXT</a>'s architectural state in bytes </p>

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<h2 class="memtitle"><span class="permalink"><a href="#ga63af62bca2c39be3fd6edd57ad2ac5c3">&#9670;&nbsp;</a></span>DEFAULT_CONTEXT_IMPL</h2>

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          <td class="memname">const ADDRINT DEFAULT_CONTEXT_IMPL = 0</td>
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<p>A constant that designates default (canonical) <a class="el" href="structCONTEXT.html">CONTEXT</a> implementation. </p>

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<h2 class="memtitle"><span class="permalink"><a href="#ga0f5ad5017cf79566f740ff72e37dfeec">&#9670;&nbsp;</a></span>FPSTATE_ALIGNMENT <span class="overload">[1/2]</span></h2>

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          <td class="memname">const size_t FPSTATE_ALIGNMENT = 64</td>
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<p>This is the alignment that the structure used to save the <a class="el" href="structFPSTATE.html">FPSTATE</a> The alignment required by xsave is 64, the alignment required by fxsave is 16 - so we use the larger </p>

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<a id="ga0f5ad5017cf79566f740ff72e37dfeec"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga0f5ad5017cf79566f740ff72e37dfeec">&#9670;&nbsp;</a></span>FPSTATE_ALIGNMENT <span class="overload">[2/2]</span></h2>

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          <td class="memname">const size_t FPSTATE_ALIGNMENT = 64</td>
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<p>This is the alignment that the structure used to save the <a class="el" href="structFPSTATE.html">FPSTATE</a> The alignment required by xsave is 64, the alignment required by fxsave is 16 - so we use the larger </p>

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<a id="gaaf302a6d2cb4e89c0355540b1b0951d7"></a>
<h2 class="memtitle"><span class="permalink"><a href="#gaaf302a6d2cb4e89c0355540b1b0951d7">&#9670;&nbsp;</a></span>FPSTATE_SIZE <span class="overload">[1/2]</span></h2>

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          <td class="memname">const size_t FPSTATE_SIZE = sizeof(<a class="el" href="structFPSTATE.html">FPSTATE</a>)</td>
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<p>Size of Pin's (full) FP state structure. It is larger than the size of the structure used by the fxsave instruction (see FXSAVE). It may be larger than the size of the structure used by the xsave instruction, depending on the features enabled in the xstate_bv field in the extended header. </p>

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<h2 class="memtitle"><span class="permalink"><a href="#gaaf302a6d2cb4e89c0355540b1b0951d7">&#9670;&nbsp;</a></span>FPSTATE_SIZE <span class="overload">[2/2]</span></h2>

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          <td class="memname">const size_t FPSTATE_SIZE = sizeof(<a class="el" href="structFPSTATE.html">FPSTATE</a>)</td>
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<p>Size of Pin's (full) FP state structure. It is larger than the size of the structure used by the fxsave instruction (see FXSAVE). It may be larger than the size of the structure used by the xsave instruction, depending on the features enabled in the xstate_bv field in the extended header. </p>

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<a id="gab6031aa9d9115234b9c49c6d5ab6d9fa"></a>
<h2 class="memtitle"><span class="permalink"><a href="#gab6031aa9d9115234b9c49c6d5ab6d9fa">&#9670;&nbsp;</a></span>NUM_CONTEXT_INT_REGS</h2>

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          <td class="memname">const ADDRINT NUM_CONTEXT_INT_REGS = NUM_PHYSICAL_REGS + <a class="el" href="group__CONTEXT.html#gaead9b5f2f3655bbaf2776ad99e2ad279">NUM_SPECIAL_REGS</a></td>
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<p>Total number of integer registers in <a class="el" href="structCONTEXT.html">CONTEXT</a> </p>

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<h2 class="memtitle"><span class="permalink"><a href="#ga565196a3eaf9539660ef24845ca8c967">&#9670;&nbsp;</a></span>NUM_CONTEXT_REGS</h2>

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          <td class="memname">const ADDRINT NUM_CONTEXT_REGS = REG_LAST_CONTEXT_REG + 1</td>
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<p>Total number of registers in <a class="el" href="structCONTEXT.html">CONTEXT</a> (app registers + tool registers + special) </p>

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<h2 class="memtitle"><span class="permalink"><a href="#gaead9b5f2f3655bbaf2776ad99e2ad279">&#9670;&nbsp;</a></span>NUM_SPECIAL_REGS</h2>

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          <td class="memname">const ADDRINT NUM_SPECIAL_REGS = 2 + NUM_SCRATCH_REGS</td>
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<p>REG_SEG_FS_BASE and REG_SEG_GS_BASE are represented as special IA-32/Intel(R) 64 architecture registers </p>

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<h2 class="memtitle"><span class="permalink"><a href="#ga67017a2889bb2234e34bd3a943c94bfe">&#9670;&nbsp;</a></span>NUM_TILE_AND_CFG_REGS</h2>

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          <td class="memname">const ADDRINT NUM_TILE_AND_CFG_REGS = <a class="el" href="group__CONTEXT.html#ga47e2bd8a7244f986c5a007bd7070f851">NUM_TILE_REGS</a> + 1</td>
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<p>Number of tile register + tile configuration "register" </p>

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<h2 class="memtitle"><span class="permalink"><a href="#ga47e2bd8a7244f986c5a007bd7070f851">&#9670;&nbsp;</a></span>NUM_TILE_REGS</h2>

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          <td class="memname">const ADDRINT NUM_TILE_REGS = REG_TMM_LAST - REG_TMM_FIRST + 1</td>
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<p>Number of tile register (AMX) </p>

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<h2 class="memtitle"><span class="permalink"><a href="#gacfbdf1b39ed0b4164bd9321b830861c9">&#9670;&nbsp;</a></span>TILE_SIZE_BYTES</h2>

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          <td class="memname">const ADDRINT TILE_SIZE_BYTES = 1024</td>
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<p>Tile size in bytes </p>

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<h2 class="memtitle"><span class="permalink"><a href="#ga0b20fa4bfec9777b1e6f0a43e886c712">&#9670;&nbsp;</a></span>TILE_STATE_SIZE</h2>

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          <td class="memname">const ADDRINT TILE_STATE_SIZE = (<a class="el" href="group__CONTEXT.html#ga47e2bd8a7244f986c5a007bd7070f851">NUM_TILE_REGS</a>) * <a class="el" href="group__CONTEXT.html#gacfbdf1b39ed0b4164bd9321b830861c9">TILE_SIZE_BYTES</a></td>
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<p>Size of Tile state buffer inside <a class="el" href="structCONTEXT.html">CONTEXT</a> in bytes. </p>

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<h2 class="memtitle"><span class="permalink"><a href="#ga3657dd0da615cb4afd7682f365979373">&#9670;&nbsp;</a></span>TILECFG_SIZE_BYTES</h2>

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          <td class="memname">const ADDRINT TILECFG_SIZE_BYTES = 64</td>
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<p>Tile configuration virtual register size in bytes (this is not a real CPU register) </p>

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<h2 class="memtitle"><span class="permalink"><a href="#gad1b665d43ed8655d42cf86e474ceb5ea">&#9670;&nbsp;</a></span>VSTATE_PADDING <span class="overload">[1/2]</span></h2>

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          <td class="memname">const size_t VSTATE_PADDING = 128</td>
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<p>Size of the reserved bytes between the XSTATE and the VSTATE parts of the FP state area, as defined by the xsave layout in the SDM. </p>

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<h2 class="memtitle"><span class="permalink"><a href="#gad1b665d43ed8655d42cf86e474ceb5ea">&#9670;&nbsp;</a></span>VSTATE_PADDING <span class="overload">[2/2]</span></h2>

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<p>Size of the reserved bytes between the XSTATE and the VSTATE parts of the FP state area, as defined by the xsave layout in the SDM. </p>

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<div class="ttc" id="agroup__CONTEXT_html_ga3657dd0da615cb4afd7682f365979373"><div class="ttname"><a href="group__CONTEXT.html#ga3657dd0da615cb4afd7682f365979373">TILECFG_SIZE_BYTES</a></div><div class="ttdeci">const ADDRINT TILECFG_SIZE_BYTES</div><div class="ttdef"><b>Definition:</b> reg_ia32.PH:1125</div></div>
<div class="ttc" id="agroup__CONTEXT_html_ga67017a2889bb2234e34bd3a943c94bfe"><div class="ttname"><a href="group__CONTEXT.html#ga67017a2889bb2234e34bd3a943c94bfe">NUM_TILE_AND_CFG_REGS</a></div><div class="ttdeci">const ADDRINT NUM_TILE_AND_CFG_REGS</div><div class="ttdef"><b>Definition:</b> reg_ia32.PH:1135</div></div>
<div class="ttc" id="agroup__CONTEXT_html_gaead9b5f2f3655bbaf2776ad99e2ad279"><div class="ttname"><a href="group__CONTEXT.html#gaead9b5f2f3655bbaf2776ad99e2ad279">NUM_SPECIAL_REGS</a></div><div class="ttdeci">const ADDRINT NUM_SPECIAL_REGS</div><div class="ttdef"><b>Definition:</b> reg_ia32.PH:1103</div></div>
<div class="ttc" id="agroup__CONTEXT_html_gaaf302a6d2cb4e89c0355540b1b0951d7"><div class="ttname"><a href="group__CONTEXT.html#gaaf302a6d2cb4e89c0355540b1b0951d7">FPSTATE_SIZE</a></div><div class="ttdeci">const size_t FPSTATE_SIZE</div><div class="ttdef"><b>Definition:</b> fpstate_ia32.PH:83</div></div>
<div class="ttc" id="agroup__CONTEXT_html_ga0f5ad5017cf79566f740ff72e37dfeec"><div class="ttname"><a href="group__CONTEXT.html#ga0f5ad5017cf79566f740ff72e37dfeec">FPSTATE_ALIGNMENT</a></div><div class="ttdeci">const size_t FPSTATE_ALIGNMENT</div><div class="ttdef"><b>Definition:</b> fpstate_ia32.PH:90</div></div>
<div class="ttc" id="agroup__CONTEXT_html_ga0b20fa4bfec9777b1e6f0a43e886c712"><div class="ttname"><a href="group__CONTEXT.html#ga0b20fa4bfec9777b1e6f0a43e886c712">TILE_STATE_SIZE</a></div><div class="ttdeci">const ADDRINT TILE_STATE_SIZE</div><div class="ttdef"><b>Definition:</b> reg_ia32.PH:1140</div></div>
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